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[Other resourceSDR_SDRAM_controler_verilog

Description: 可以用的通用SDRAM控制器,可以用在FPGA上,是SDR类型的
Platform: | Size: 9560 | Author: 郑宏超 | Hits:

[DSP programSDRAM_DMA

Description: 基于ADSP TS201的DMA传输程序,SDMA与TS201实现DMA传输-DMA on the ADSP TS201 transmission process, SDMA and the achievement of DMA transfer TS201
Platform: | Size: 50176 | Author: 李刚 | Hits:

[OtherTMS320C6000

Description: dsp_tms320c6000系列文档,通过这些文档使您更有利的进行开发-dsp_tms320c6000 series of documents, these documents allow you to develop a more favorable
Platform: | Size: 15827968 | Author: yangbm | Hits:

[Software Engineeringsdram_introduce

Description: sdram内存技术指南(sdr,ddr,ddr2,ddr3)-sdram memory technology guide (sdr, ddr, ddr2, ddr3)
Platform: | Size: 4068352 | Author: 杨洪涛 | Hits:

[VHDL-FPGA-Verilog83399055ref-sdr-sdram-verilog

Description: Summary: InterPreTS (Interaction Prediction through Tertiary Structure) is a web-based version of our hod for predicting protein-protein interactions (Aloy and Russell, 2002, Proc. Natl Acad. Sci. USA, 99, 5896-5901). Given a pair of query sequences, we first search for homologues in a database of interacting domains (DBID) of known three-dimensional complex structures. Pairs of sequences homologous to a known interacting pair-Summary: InterPreTS (Interaction Prediction through Tertiary Structure) is a web-based version of our method for predicting protein-proteiinteractions (Aloy and Russell, 2002, Proc. Natl Acad. Sci. USA, 99, 5896-5901). Given a pair of query sequences, we first search for homologues in a database of interacting domains (DBID) of known three-dimensional complex structures. Pairs of sequences homologous to a known interacting pair
Platform: | Size: 718848 | Author: wx | Hits:

[VHDL-FPGA-VerilogSdram_Control_4Port

Description: 使用verilog HDL写的sdram(SDR)的控制器源代码,具有很好的可移植性,试验的例子已经通过QuartusII 9.0编译通过,可以运行在cycloneII上-Controller source code using verilog HDL written in the sdram (SDR), has good portability, test examples via the QuartusII 9.0 compiler, you can run in cycloneII
Platform: | Size: 20480 | Author: 李立鸣 | Hits:

[VHDL-FPGA-Verilogverilog

Description: it is xilinx SDR SDRAM controller core
Platform: | Size: 297984 | Author: roger1 | Hits:

[Software EngineeringSDRAM_verilog

Description: SDR SDRAM用verilog语言实现-SDR SDRAM using verilog language
Platform: | Size: 16384 | Author: 李美 | Hits:

[Linux-Unixqcom-gcc-msm8660

Description: Header file for the Atmel DDR SDR SDRAM Controller.
Platform: | Size: 3072 | Author: nongmaodg | Hits:

[VHDL-FPGA-Verilogsdram_demo

Description: 主要编写了sdram的驱动程序开发程序,在开发板上运行成功-this file is to drive sdr sdram , it runs on platform successfully
Platform: | Size: 4276224 | Author: 张绍龙 | Hits:

[Technology ManagementDDR3-User-Guide

Description: 在DDR3内存控制器一起使用JESD79-3C符合标准SDRAM器件接口。内存类型,如DDR1 SDRAM,DDR2 SDRAM,SDR SDRAM,SBSRAM和异步不支持的回忆。在DDR3内存控制器,SDRAM,可用于程序和数据存储。梯形失真校正设备有一个实例。-Use JESD79-3C standard SDRAM DDR3 memory controller interface devices together. Memory types, such as DDR1 SDRAM, DDR2 SDRAM, SDR SDRAM, SBSRAM and do not support asynchronous memories. In DDR3 memory controller, SDRAM, can be used for program and data storage. Keystone device has one instance.
Platform: | Size: 479232 | Author: youwenjiang | Hits:
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